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Design Goals
From 256 bytes to 512K RAM
Whilst a great cost pared design, the original MK14 did have some extremely annoying features. I would include the following in these:
- Keyboard that I could only get to work with a compass point - and then only once!
- No backing store (as standard) or non-volatile storage - typing in 225 bytes of programme everytime I wanted to play "Moon Lander" was not my idea of fun
- Limited visibility of miniscule calculator display
- Very limited amount of RAM
- Inflexible address decoding if you were tempted to add more RAM or other I/O
So I decided to fix all these in my redesign. The V2.0 machine has the following features:
- Original SC/MP processor and INS8154 I/O running at original 4.43 MHz clock speed.
- Build option for original LED calculator display or rather more legible 0.3" LEDs
- Keyboard that works, with proper keyboard switches
- 512K Rom, 512K RAM
- Memory split into multiple images - 16 x 4K original memory maps AND 14 "high" memory modes with 32K RAM and 32K ROM in each image.
- Multiple memory images effectively gives you multiple MK14s (at the flick of a switch). You can load 16 programmes each of which uses all the available RAM in the CPU memory map
- Multiple images applies to the ROM too. You want the classic monitor with the "---- --" start-up display or the extended monitor with cassette interface support? No problem - have both!
- Memory is battery backed, so once entered your programmes stay there, even when power has been removed.
- All address decoding is implemented in a CPLD, so a firmware change gives whatever memory map you can dream up.
- Patch area for adding custom hardware such as D/A, single step, MSF receiver etc.
- CPLD is programmed in VHDL. This makes it easy to change and portable to another CPLD architecture for the V3.0 version an another 20 years time!.
The overiding goal I had was 100% software and hardware interface compatibility with the original. That means programmes run at the same speed, the memory map has the same aliases and the RAM I/O works exactly the same as it always did. The extended memory modes let you do more (in a fully decoded 32K+32K), or you could map more RAM by removing some of the ROM repeats in the original 4K image by changing a couple of lines in the CPLD VHDL code.